Towards Memory Oriented Scalable Computer Architecture and High Efficiency Petaflops Computing

 

Speaker: Thomas Sterling, the California Institute of Technology

                       http://www.cacr.caltech.edu/~tron/

Speaker Bio: Thomas Sterling is a leader in the field of innovative high performance computer architecture. Since receiving his Ph.D from MIT as a Hertz fellow two decades ago, he has conducted extensive research in advanced parallel computer structures and computational models. In 1993, he started the NASA Beowulf Project to harness multiple personal computers (PCs) with the goal of accelerating large technical application programs with order of magnitude improvement in performance to cost. This led to the creation of the Beowulf-class of PC clusters and initiated the emergence of Linux-based commodity clusters, for which he and his colleagues were awarded the Gordon Bell Prize in 1997. His 1998 MIT Press book, “How to Build a Beowulf” was a landmark work in cluster computing and sold out its first printing in six weeks. Throughout the decade of the 90’s, Thomas Sterling was a leader in the National Petaflops Initiative, a loose confederation of experts and institutions across the country sponsored by the federal government to investigate concepts and technologies for enabling systems capable of achieving performance in the trans-Petaflops regime. As part of this ground breaking exploration, he chaired multiple inter-disciplinary workshops and co-authored the book “Enabling Technologies for Petaflops Computing”. He also supported the President’s Information Technology Advisory Committee in 1999 and was a member of both the DOD Integrated High End Computing Initiative in 2002 and the multi-agency High End Computing Revitalization Task Force workshop in 2003. From 1996 to 2000 Thomas was the Principal Investigator of the HTMT project involving more than a dozen institutions and 70 contributors to conduct a design study of a potential future Petaflops scale computer incorporating advanced technologies including superconducting logic, optical communications, holographic storage, and processor in memory (PIM) components. Thomas and his team at Caltech and JPL are currently developing a new class of advanced PIM architecture for efficient scalable HEC and he is collaborating with a number of institutions on related research including the University of Notre Dame, Argonne National Laboratory, Sandia National Laboratory, the University of Delaware, and Cray.

 

In-VIGO: Making the grid virtually yours

 

Speaker: José A.B. Fortes,  University of Florida

                      http://www.fortes.ece.ufl.edu

Speaker Bio: José Fortes received his BS degree in Electrical Engineering from the Universidade de Angola in 1978, his MS degree in Electrical Engineering from the Colorado State University, Fort Collins in 1981 and his PhD degree in Electrical Engineering from the University of Southern California, Los Angeles in 1984. From 1984 to 2001 he was on the faculty of the School of Electrical and Computer Engineering of Purdue University, West Lafayette, Indiana. In 2001, he joined both the Department of Electrical and Computer Engineering and the Department of Computer and Information Science and Engineering of the University of Florida as Professor and BellSouth Eminent Scholar. His research interests are in the areas of network computing, distributed information processing systems, advanced computing architecture and nanocomputing. José Fortes is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) professional society. He was a Distinguished Visitor of the IEEE Computer Society from 1991 to 1995.

 

Summary: In-VIGO is a grid-computing system designed to support computational tools for engineering and science research In Virtual Information Grid Organizations (as opposed to in-vivo or in-vitro experimental research). A novel aspect of In-VIGO is its extensive use of virtualization technology, emerging standards for grid-computing and other Internet middleware. In the context of In-VIGO, virtualization denotes the ability of resources to support multiplexing, manifolding and polymorphism (i.e. to simultaneously appear as multiple resources with possibly different functionalities). Virtualization technologies are available or emerging for all the resources needed to construct virtual grids which would ideally inherit the above mentioned properties. In particular, these technologies enable the creation of dynamic pools of virtual resources that can be aggregated on-demand for application-specific user-specific grid-computing. This change in paradigm from building grids out of physical resources to constructing virtual grids has many advantages but also requires new thinking on how to architect, manage and optimize the necessary middleware. This talk reviews the motivation for In-VIGO approach, discusses the technologies used, describes and reports on experiences with a deployed architecture for In-VIGO that represents a first step towards the end goal of building virtual information grids. It will also discuss service-based designs being investigated and implemented in the next-generation In-VIGO system.

Secure Grid Computing with Trusted
Resources and Internet Datamining

 

Speaker: Professor Kai Hwang,  University of Southern California

                      http://gridsec.usc.edu/hwang.html

Speaker Bio:  Kai Hwang is a Professor of Electrical Engineering and Computer Science and Director of Internet and Grid Computing Laboratory at USC. He received the Ph.D. from UC Berkeley. He is the founding Editor-in-Chief of the Journal of Parallel and Distributed Computing. His latest books, Scalable Parallel Computing (McGraw-Hill, 1998) and Advanced Computer Architecture (McGraw-Hill 1993), are used worldwide. An IEEE Fellow, he has received numerous research grants and achievement awards. Dr. Hwang has lectured worldwide and performed advisory work for IBM, JPL, MIT Lincoln, Intel SSD, ETL in Japan, and GMD in Germany. Presently, he leads a NSF-sponsored ITR Project at USC on Grid security for distributed supercomputing. The ultimate goal is to develop reliable, trustworthy, and highly available Grid resources for pervasive, peer-to-peer, and Grid computing. 

 

Summary: Internet-based Grid computing is emerging as one of the most promising technologies that may change the world. Dr. Hwang and his research team at the University of Southern California (USC) are working on self-defense tools to protect Grid resources from cyber attacks or malicious intrusions, automatically. This project builds an automated intrusion response and trust management system to facilitate authentication, authorization, and security binding in using metacomputing Grids or peer-to-peer web services. The trusted GridSec infrastructure supports Internet traffic datamining, encrypted tunneling, optimized resource allocations, network flood control and anomaly detection, etc.

The USC team is developing a NetShield library to protect Grid resources. This new security system adjusts itself dynamically with changing threat patterns and network traffic conditions. This project promotes the acceptance of Grid computing through international collaborations with the research groups in INRIA, France, Chinese Academy of Sciences, and Melbourne University. The fortified Grid infrastructure will benefit security-sensitive allocations in digital government, electronic commerce, anti-terrorism activities, and cyberspace crime control. The broader impacts of this ITR project are far reaching in an era of growing demand of Internet, Web and Grid services.

Productivity in HPC Clusters

 

Speaker: Dr. Robert Kuhn,  Intel

Speaker Bio:  Dr. Robert Kuhn is a Director at Intel Americas, Inc.  He has 25 years experience defining, implementing, and managing the development of parallel and distributed processing compilers and tools and has worked with many strategic customers and application developers on adopting parallel processing. He has been with Intel since 1993 where he was instrumental in developing and founding the OpenMP standard which has now been adopted by all major OEMs.  He has managed a team of developers and application engineers implementing threading tools that are being used by the major ISVs.He has managed the development of the first MPI-OpenMP performance analysis tool. It is scalable to over 1000 processors.His team has worked with grid technology such as UNICORE and the GGF DRMAA.Prior to that he was technical applications, compilers, and libraries manager at Alliant Computer Systems where he introduced automatic Parallelization technology into Alliant's compilers.  He also did pioneering work managing a team of application experts working with the leading technical application ISVs in parallelizing their applications. Before 1987, he has advanced the state of the art in IC CAD tools by developing expert system based techniques for compiling functional specifications into silicon. He received his PhD in Computer Science from the University of Illinois in 1980 in compilation techniques for high performance systems.  He prepared and presented the first tutorial on parallel processing.

 

 

PERCS: IBM Effort in HPCS

 

Speaker: Dr. Mootaz Elnozahy,  IBM

Speaker Bio:  Mootaz is a Senior Manager and a Master Inventor at IBM Research in Austin, Texas. He obtained a B.Sc. degree in Electrical Engineering from Cairo University, and the M.S. and Ph.D. degrees in Computer Science from
Rice University. From 1993 until 1997, he was on the faculty at the School of Computer Science at Carnegie Mellon University, where he received a prestigious NSF CAREER award. Since 1997, he has been with the IBM Austin Research Lab, where he started the Systems Software Department, and which he currently leads. While at IBM, he has worked on code compression for PowerPC, cc-NUMA systems for x-86 platforms, acceleration of the Web site performance for the Census bureau (with IGS), blade-based servers, and currently PERCS. His department also is developing the Mambo full system simulator, tools for system-level power analysis, Web-based monitoring tools and fundamental research in low-power systems. Mootaz is an Adjunct Associate Professor at the University of Texas at Austin, and has consulted with Bell Labs, Bellcore, NSF and the state of Texas in the mid-1990's, and served on 19 technical program committees in the areas of distributed operating systems and reliability. 
Mootaz's research interests include distributed systems, operating systems, computer architecture, and fault tolerance. He has published over 25 regularly cited articles in these areas, and obtained 19 patents. 

 

Summary: 

The High Productivity Computing Systems (HPCS) is a DARPA-sponsored initiative that signals a fundamental shift in the way high-end computing systems are to be 
built and evaluated. Instead of the traditional myopic focus on performance as the most important system property, users in the technical computing community now
have a broader definition of productivity of a system. This definition includes issues of usability, robustness, system management, and ease of programming. A productive system is one that delivers a high level of performance while scoring equally well on the other aspects of the system. Recognizing the difficulty of this task, the HPCS program aims at reinvigorating the research community by sponsoring groundbreaking ideas that could yield a commercially viable system for the 2010 timeframe. This talk will cover the general vision behind our effort and how we envision adaptable systems that could do well both on commercial and technical workloads.